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1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c 19-5063; rev 3; 1/11 + denotes a lead(pb)-free/rohs-compliant package. t = tape and reel. general description the max8900_ is a high-frequency, switch-mode char - ger for a 1-cell lithium ion (li+) or lithium polymer (li-poly) battery. it delivers up to 1.2a of current to the battery from 3.4v to 6.3v (max8900a/max8900c) or 3.4v to 8.7v (max8900b). the 3.25mhz switch-mode charger is ideally suited to small portable devices such as headsets and ultra-portable media players because it minimizes component size and heat. several features make the max8900_ perfect for high- reliability systems. the max8900_ is protected against input voltages as high as +22v and as low as -22v. battery protection features include low voltage prequali - fication, charge fault timer, die temperature monitoring, and battery temperature monitoring. the battery temper - ature monitoring adjusts the charge current and termina- tion voltage as described in the jeita* specification for safe use of secondary lithium-ion batteries. charge parameters are easily adjustable with external components. an external resistance adjusts the charge current from 50ma to 1200ma. another external resis - tance adjusts the prequalification and done current thresholds from 10ma to 200ma. the done current thresh - old is very accurate achieving q 1ma at the 10ma level. the charge timer is adjustable with an external capacitor. the max8900_ is available in a 0.4mm pitch, 2.44mm x 2.67mm x 0.64mm wlp package. applications features s 3.25mhz switching li+/li-poly battery charger s jeita battery temperature monitor adjusts charge current and termination voltage s 4.2v 0.5% battery regulation voltage (alternate 4.1v target available on request) s adjustable done current threshold adjustable from 10ma to 200ma 1ma accuracy at 10ma s high-efficiency and low heat s uses a 2.0mm x 1.6mm inductor s positive and negative input voltage protection (22v) s up to +20v operating range (alternate ovlo ranges available on request) s supports no-battery operation s fault timer s charge status outputs s 2.44mm x 2.67mm x 0.64mm package simplified applications circuit ordering information (continued) usb charging headsets and media players smartphones digital cameras gps, pnd ebook ordering information continued at end of data sheet. part temp range pin- package options MAX8900AEWV+t -40nc to +85nc 30 wlp v ovlo = 6.5v t1 = 0nc 2-pin status indicators v pquth = 2.8v max8900bewv+t -40nc to +85nc 30 wlp v ovlo = 9.0v t1 = -15nc 3-pin status indicators v pquth = 2.8v max8900_ 1fh li+/ li-poly system load bst lx 2.2ff 6.3v 0603 0.47ff 25v 0603 0.47ff 25v 0603 v in (-22v to +22v) 1.0ff 6.3v 0402 off on in stat1 stat2 stat3 cen pvl inbp ct seti dni thm t gnd avl bat pgnd cs * jeita (japan electronics and information technology industries association) standard, a guide to the safe use of secondary lithium ion batteries in notebook-type personal computers april 20, 2007. evaluation kit available for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maximintegrated.com.
2 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c table of contents absolute maximum ratings ...................................................................... 4 electrical characteristics ........................................................................ 4 typical operating characteristics ................................................................. 8 pin configuration ............................................................................. 13 pin description ............................................................................... 13 detailed description ........................................................................... 17 control scheme ............................................................................. 17 soft-start .................................................................................. 17 setting the fast-charge current (seti) .......................................................... 17 setting the prequalification current and done threshold (dni) ........................................ 18 charge enable input ( cen ) ................................................................... 18 charger states ............................................................................. 19 charger disabled state .................................................................... 22 dead-battery state ........................................................................ 22 dead battery + prequalification state ......................................................... 22 prequalification state ...................................................................... 22 fast-charge constant current state .......................................................... 22 fast-charge constant voltage state .......................................................... 22 top- off state ............................................................................ 22 done state .............................................................................. 23 timer fault state ......................................................................... 23 battery hot/cold state ..................................................................... 23 v in too high state ........................................................................ 23 charge timer (ct) .......................................................................... 23 thermal management ........................................................................ 23 thermistor monitor (thm) .................................................................. 24 thermal foldback ........................................................................ 26 thermal shutdown ........................................................................ 26 pvl and avl regulator ....................................................................... 27 charge status outputs (3 pin) ................................................................. 27 charge status outputs (2 pin + > t4) ............................................................ 27 inductor selection ........................................................................... 28 bat capacitor .............................................................................. 29 inbp capacitor ............................................................................. 29 other capacitors ............................................................................ 29 applications information ........................................................................ 30 dynamic charge current programming .......................................................... 30 no-battery operation ........................................................................ 30 maxim integrated
3 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c table of contents ( continued) list of figures figure 1. applications circuit: single seti resistor, status indicators connected to leds .................... 15 figure 2. applications circuit: multiple charge rates managed by p to be usb compliant, status indicators connected to a p ............................................................................ 15 figure 3. functional diagram .................................................................... 16 figure 4. fast-charge current vs. r seti ( www.maximintegrated.com/tools/other/software/max8900-rseti.xls ) 18 figure 5. prequalification current and done threshold vs. r dni ( www.maximintegrated.com/tools/other/software/ max8900-dni.xls ) .................................................................... 18 figure 6. li+/li-poly charge profile ............................................................... 19 figure 7. charger state diagram (3-pin status) ...................................................... 20 figure 8. charger state diagram (2-pin status) ...................................................... 21 figure 9. charge times vs. c ct .................................................................................... 23 figure 10. jeita battery safety regions ........................................................... 25 figure 11. thermistor monitor detail ............................................................... 26 figure 12. charge current vs. junction temperature ................................................. 26 figure 13. calculated fast-charge current vs. dropout voltage .......................................... 29 figure 14. power pcb layout example ............................................................ 32 figure 15. recommended land pattern ........................................................... 33 figure 16. bump cross section and copper pillar detail .............................................. 33 list of tables table 1. 2.44mm x 2.67mm x 0.64mm, 0.4mm pitch wlp thermal characteristics .......................... 24 table 2. trip temperatures for different thermistors .................................................. 25 table 3. 3-pin status output truth table ........................................................... 27 table 4. 2-pin status output truth table ........................................................... 27 table 5. recommended inductor selection ......................................................... 28 table 6. recommended inductor ................................................................. 28 charge-source issues ....................................................................... 30 charge-source impedance ................................................................. 30 inductive kick ............................................................................ 30 overvoltage and reverse input voltage protection ............................................... 31 pcb layout ................................................................................ 31 chip information .............................................................................. 33 package information ........................................................................... 34 revision history .............................................................................. 35 maxim integrated
4 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in to pgnd ............................................................. -22v to +22v inbp to pgnd .......................................... (v bat - 0.3v) to +22v in to inbp .............................................................. -30v to +1.2v stat1, stat2 to gnd .......................................... -0.3v to +30v bst to pgnd ......................................................... -0.3v to +36v bst to lx .............................................................. -0.3v to +6.0v bst to pvl ............................................................ -0.3v to +30v pvl, bat, cs to pgnd ........................................ -0.3v to +6.0v avl, stat3, cen, thm to gnd .......................... -0.3v to +6.0v pvl to avl ........................................................... -0.3v to +0.3v ct to gnd ................................................. -0.3v to (avl + 0.3v) seti, dni to gnd .................................... -0.3v to (v bat + 0.3v) pgnd to gnd ...................................................... -0.3v to +0.3v in continuous current ................................................... 2.4a rms lx continuous current (note 1) .................................... 1.6a rms cs continuous current ................................................ 1.3a rms bat continuous current ............................................... 1.3a rms continuous power dissipation (t a = +70nc) 30-bump wlp (derate 20.4mw/ nc above +70nc) .... 1616mw operating temperature range .......................... -40nc to +85nc junction temperature ...................................... -40nc to +150nc storage temperature range ............................ -65nc to +150nc soldering temperture (reflow) ........................................ +260nc electrical characteristics (v in = 6v, v bat = 4v, r seti = 2.87ki, r dni = 3.57ki, v thm = v avl/2 , circuit of figure 1, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) (note 2) absolute maximum ratings note 1: lx has an internal clamp diode to pgnd and inbp. applications that forward bias these diodes should take care not to exceed the power dissipation limits of the device. parameter symbol conditions min typ max units general in input voltage range (note 3) v in withstand voltage -20 +20 v operating voltage max8900b 3.4 8.7 v max8900a/ max8900c 3.4 6.3 in undervoltage threshold v uvlo v in falling, 400mv hysteresis (note 4) 3.1 3.2 3.3 v in to bat shutdown threshold v in2bat when charging stops, v in falling, 200mv hysteresis 0 15 30 mv in overvoltage threshold (note 3) v ovlo v in rising 0.40v hysteresis (max8900b) 8.80 9.00 9.20 v 0.26v hysteresis (max8900a/ max8900c) 6.35 6.50 6.65 in supply current i in charger enabled, no switching 1 2 ma charger enabled, f = 3.25mhz, v in = 6v 20 charger disabled, cen = high 0.04 0.2 lx high-side resistance r hs 0.10 i lx low-side resistance r ls 0.15 i lx leakage current lx = gnd or in t a = +25nc 0.01 10 fa t a = +85nc 0.1 bst leakage current v bst - v lx = 6v t a = +25nc 0.01 10 fa t a = +85nc 0.1 current-sense resistor r sns v bat = 2.6v 0.045 i in to bat dropout resistance r in2bat calculation estimates a 40mi inductor resistance (r l ), r in2bat = r in2inbp + r hs + r l + r sns 0.3 i switching frequency f sw v bat = 2.6v 3.25 mhz maxim integrated
5 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c electrical characteristics (continued) (v in = 6v, v bat = 4v, r seti = 2.87ki, r dni = 3.57ki, v thm = v avl/2 , circuit of figure 1, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) (note 2) parameter symbol conditions min typ max units minimum on-time t on-min 90 ns maximum on-time t on-max 9 fs minimum off-time t off 75 ns bat regulation voltage (note 3) v batreg i bat = 0ma, max8900a/ max8900b/ max8900c (figure 10) t a = +25nc, v thm between t1 and t3 4.179 4.200 4.221 v t a = -40nc to +85nc, v thm between t1 and t3 4.158 4.200 4.242 t a = +25nc, v thm between t3 and t4 (note 5) 4.055 4.075 4.095 t a = -40nc to +85nc, v thm between t3 and t4 (note 5) 4.034 4.075 4.100 charger restart threshold (note 6) v rstrt v thm between t1 and t3 -70 -100 -125 mv v thm between t3 and t4 -75 bat prequalification lower threshold (figure 6) v pqlth v bat rising,180mv hysteresis 2.1 v bat prequalification upper threshold (figure 6) (note 3) v pquth v bat rising, 180mv typical hysteresis max8900a/max8900b 2.7 2.8 2.9 v max8900c 2.9 3.0 3.1 fast-charge current i fc v thm between t2 and t4 (figure 10) r seti = 2.87ki 1166 1190 1214 ma r seti = 6.81ki 490 500 510 r seti = 34.0ki 99 101 103 v thm between t1 and t2 (figure 10); the fast-charge current is reduced to 50% the value programmed by r seti 50 % fast-charge current set range (figure 5) minimum 50 ma maximum 1200 fast-charge setting resistor range r seti (figure 5) minimum 2.87 ki maximum 68.1 done current i dn v thm between t2 and t4 (figure 10) r dni = 3.83ki (note 5) 93 99 105 ma r dni = 7.68ki (note 5) 47 50 53 r dni = 38.3ki 9.5 10.5 11.5 v thm between t1 and t2 (figure 10); the done current threshold is reduced to 50% the value programmed by r dni 50 % prequalification current i pq v thm between t2 and t4 (figure 10), v bat = 2.6v r dni = 3.83ki (note 5) 95 105 115 ma r dni = 7.68ki (note 5) 49 54 59 r dni = 38.3ki (note 5) 10 11.5 13 v thm between t1 and t2 (figure 10); the prequalification current is reduced to 50% the value programmed by r dni 50 % maxim integrated
6 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c electrical characteristics (continued) (v in = 6v, v bat = 4v, r seti = 2.87ki, r dni = 3.57ki, v thm = v avl/2 , circuit of figure 1, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) (note 2) parameter symbol conditions min typ max units done and prequalification current set range (figure 5) minimum 9.8 ma maximum 200 done and prequalification setting resistor range r dni (figure 5) minimum 1.91 ki maximum 39.2 dead-battery charge current i dbat 0v p v bat p v dbat 45 ma dead-battery voltage threshold (figure 6) v dbat 2.5 v bat leakage current v in = 0v, v bat = 4.2v, includes lx leakage current through the inductor t a = +25nc 0.02 1 fa t a = +85nc 0.05 charger soft-start time (note 3) t ss 1.5 ms charge timer prequalification/dead-battery time t pq c ct = 0.1ff 30 min fast-charge time t fc c ct = 0.1ff 180 min top-off time t to 16 s timer accuracy -15 +15 % thermistor monitor thm hot shutoff threshold (60nc) t4 v thm /avl falling, 1% hysteresis (thermistor temperature rising) 21.24 22.54 23.84 %avl thm hot voltage foldback threshold (45nc) t3 v thm /avl falling, 1% hysteresis (thermistor temperature rising) 32.68 34.68 36.68 %avl thm cold current foldback threshold (15n c) t2 v thm /avl rising, 1% hysteresis (thermistor temperature falling) 57.00 60.00 63.00 %avl thm cold shutoff threshold (-15nc/0nc) t1 v thm /avl rising, 1% hysteresis (thermistor temperature falling) 0nc, max8900a/ max8900c 71.06 74.56 78.06 %avl -15nc, max8900b 81.43 86.07 90.98 thm input leakage thm = gnd or avl t a = +25nc -0.2 0.001 +0.2 fa t a = +85nc 0.001 charge enable input (cen) cen input voltage low v il 0.6 v cen input voltage high v ih 1.4 v cen internal pulldown resistance r cen 100 200 400 ki maxim integrated
7 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c electrical characteristics (continued) (v in = 6v, v bat = 4v, r seti = 2.87ki, r dni = 3.57ki, v thm = v avl/2 , circuit of figure 1, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) (note 2) note 2: parameters are production tested at t a = +25nc. limits over the operating temperature range are guaranteed through correlation using statistical quality control (sqc) methods. note 3: contact factory for alternative values. note 4: v in must be greater than v uvlo-rising for the part to operate when cen is pulled low. for example, if cen is low and the max8900_ is operating with v uvlo-falling < v in < v uvlo-rising , then toggling cen results in a nonoperating condition. note 5: guaranteed by design, not production tested. note 6: when the charger is in its done state, it restarts when the battery voltage falls to the charger restart threshold. the battery voltage that causes a restart (v bat-rstrt ) is v bat-rstrt = 4.2v - v rstrt . for example, with the max8900a, v bat-rstrt = 4.2v - 100mv = 4.1v. parameter symbol conditions min typ max units status outputs (stat1, stat2, stat3) stat1 and stat2 output voltage low i sink = 1ma 0.025 0.05 v i sink = 15ma 0.38 stat1 and stat2 output high leakage v stat_ = 28v t a = +25nc 0.001 1 fa t a = +85nc 0.01 stat3 output voltage low i sink = 1ma 0.01 v i sink = 15ma 0.15 0.25 stat3 output high leakage v stat3 = 5.5v t a = +25nc 0.001 1 fa t a = +85nc 0.01 pvl and avl pvl and avl output voltage 0 to 30ma internal load, v in = 6v, t a = 0nc to +85nc 4.6 5.0 5.1 v 0 to 23ma internal load, v in = 6v, t a = -40nc to +85nc thermal thermal regulation temperature t reg junction temperature when charge current is reduced 95 nc thermal regulation gain t treg the charge current is decreased 6.7% of the fast-charge current setting for every degree that the junction temperature exceeds the thermal regulation temperature 6.7 %/nc thermal-shutdown temperature t shdn junction temperature rising, 15nc hysteresis +155 nc maxim integrated
8 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c typical operating characteristics (circuit of figure 1, v in = 6v, v bat = 3.6v, t a = +25nc, unless otherwise noted.) input supply current vs. input voltage (disabled, v bat = 0v) max8900a toc01 v in (v) i in (ua) 20 10 0 -10 -20 0 20 40 60 80 100 120 -20 -30 30 v cen = 3.0v input supply current vs. input voltage (disabled, v bat = 3.6v) max8900a toc02 v in (v) i in (ua) 20 10 0 -10 -20 0 20 40 60 80 100 120 -20 -30 30 v cen = 3.0v input supply current vs. input voltage (prequalification) max8900a toc03 v in (v) i in (ma) 10 5 20 40 60 80 100 120 0 01 5 max8900a v cen = 0v v bat = 2.6v r dni = 3.83ki v in rising v in falling input supply current vs. input voltage (charging at 1.2a) max8900a toc04 v in (v) i in (a) 10 5 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 01 5 max8900a v cen = 0v v bat = 3.1v r seti = 2.87ki v in rising v in falling input supply current vs. input voltage (v in2bat detail) max8900a toc05 v in (v) i in (a) 6.5 5.5 4.5 0.2 0.4 0.6 0.8 1.0 1.2 0 3.5 7.5 v cen = 0v v bat = 4.0v r seti = 3.01ki v in rising v in falling r l = 90mi max8900a charge current vs. battery voltage max8900a toc06 v bat (v) i bat (a) 5 4 3 2 1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 06 r seti = 2.87ki r seti = 3.40ki r seti = 6.81ki r seti = 34.0ki r dni = 3.83ki v cen = 0v v in = 6.0v max8900a/ max8900b input supply current and charge current vs. input voltage max8900a toc07 v in (v) current (a) 6.5 5.5 4.5 0.2 0.4 0.6 0.8 1.0 1.2 0 3.5 7.5 max8900a v cen = 0v v bat = 4.0v r seti = 3.01ki v in falling i bat i in battery regulation voltage vs. ambient temperature max8900a toc08 ambient temperature (c) normalized v bat 60 35 10 -15 0.992 0.994 0.996 0.998 1.000 1.002 1.004 1.006 1.008 1.010 0.990 -40 85 v cen = 0v v bat = unconnected v in = 5.0v v thm = v a vl /2 battery regulation voltage vs. input voltage max8900a toc09 v in (v) normalized v bat 8 7 6 5 0.992 0.994 0.996 0.998 1.000 1.002 1.004 1.006 1.008 1.010 0.990 49 max8900b v cen = 0v v bat = unconnected maxim integrated
9 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c typical operating characteristics (continued) (circuit of figure 1, v in = 6v, v bat = 3.6v, t a = +25nc, unless otherwise noted.) switching frequency vs. input voltage max8900a toc10 input voltage (v) switching frequency (mhz) 24 20 16 12 8 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 42 8 v bat = 4v v bat = 3v max8900x v in rising v ovlo = 28v v cen = 0v r iset = 2.87k i switching frequency vs. charge current max8900a toc11 charge current (a) switching frequency (mhz) 1.0 0.8 0.6 0.4 0.2 1 2 3 4 5 6 0 0 1.2 v in = 5v, v bat = 3v v in = 6v, v bat = 4v v in = 4.5v, v bat = 4v max8900b dc switching waveforms (i bat = 100ma) max8900a toc12 5v/div 0v 0a 20mv/div 200ma/div i lx v lx v out 200ns/div max8900b dc switching waveforms (i bat = 440ma) max8900a toc13 5v/div 0v 0a 20mv/div 500ma/div i lx v lx v out 200ns/div max8900b dc switching waveforms (i bat = 1.2a) max8900a toc14 5v/div 0v 0a 20mv/div 500ma/div i lx v lx v out 200ns/div max8900a toc15 t a (c) i bat (a) 135 110 85 60 35 10 -15 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 -40 185160 r seti = 2.87ki r seti = 6.81ki v thm = v avl /2 charge current vs. ambient temperature maxim integrated
10 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c typical operating characteristics (continued) (circuit of figure 1, v in = 6v, v bat = 3.6v, t a = +25nc, unless otherwise noted.) thm normal to cold current foldback (t2) to cold shutoff (t1) max8900a toc16 2v/div 0v 0a 0ma 3.6v 600ma 1200ma (t2 < t < t3) 1v/div 200ma/div i bat v bat v thm 60% of avl (t2) 74.5% of avl (t1) 20ms/div thm normal to hot voltage foldback (t3) to hot shutoff (t4) threshold max8900a toc17 2v/div 0a 4.075v 4.2v 0v 10i resistor load 2v/div 200ma/div i bat v bat v thm 34.7% of avl (t3) 22.5% of avl (t4) 20ms/div charger enable max8900a toc18 5v/div 0a 1.2a 5v/div 5v/div 1a/div i bat v lx v pvl 400s/div v cen efficiency vs. battery voltage (constant-current mode) max8900a toc19 v bat (v) efficiency (%) 4.0 3.5 3.0 67 69 71 73 75 77 79 81 83 85 v in = 5.0v i bat = 100ma 65 2.5 4.5 efficiency vs. battery voltage (constant-current mode) max8900a toc20 v bat (v) efficiency (%) 4.3 4.1 3.9 3.7 3.5 3.3 3.1 2.9 2.7 70 75 80 85 90 95 65 2.5 4.5 i bat = 500ma i bat = 800ma i bat = 1200ma v in = 5.0v max8900a/ max8900b efficiency vs. charge current (constant-current mode) max8900a toc21 i bat (a) efficiency (%) 1.0 0.5 70 75 80 85 90 95 65 0 1.5 v in = 5.0v v bat = 3.0v v bat = 3.6v v bat = 4.0v efficiency vs. battery voltage (constant-current mode, i bat = 1200ma) max8900a toc22 v bat (v) efficiency (%) 4.3 4.1 3.9 3.7 3.5 3.3 3.1 2.9 2.7 70 75 80 85 90 95 65 2.5 4.5 i bat = 1200ma, r seti = 2.87ki v in = 5v v in = 8v v in = 7v v in = 6v v in = 8.5v max8900a/max8900b maxim integrated
11 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c typical operating characteristics (continued) (circuit of figure 1, v in = 6v, v bat = 3.6v, t a = +25nc, unless otherwise noted.) efficiency vs. input voltage (constant-current mode) v in (v) efficiency (%) 9 8 6 7 76 78 80 82 86 84 88 90 74 51 0 max8900a toc23 i bat = 1200ma, r seti = 2.87k i v bat = 4.0v v bat = 3.6v v bat = 3.0v efficiency vs. charge current (constant-voltage mode) max8900a toc24 i bat (a) efficiency (%) 1000 500 75 80 85 90 95 100 70 0 1500 v in = 5v, v bat = 4.2v battery + lx leakage current vs. input voltage max8900a toc25 input voltage (v) battery leakage current (na) 1234 100 1000 10 05 cen = 1 v bat = 4.0v v bat = 3.2v battery voltage (v) battery leakage current (na) 5 4 3 2 1 5 10 15 20 25 30 35 40 45 50 0 06 battery + lx leakage current vs. battery voltage max8900a toc26 in unconnected stat indicator current not included battery + lx leakage current vs. ambient temperature max8900a toc27 temperature ( c) battery leakage current (na) 60 35 10 -15 10 20 30 40 50 60 0 -40 85 in unconnected stat indicator current not included avl voltage vs. input voltage max8900a toc28 v in (v) v avl (v) 25 20 15 10 5 1 2 3 4 5 6 0 03 0 max8900x v ovlo = 28v v cen = 0v v bat = 3.6v r seti = 2.87k i v ovlo max8900_ charge profile (constant-current to done modes) max8900a toc29 time (s) voltage (v) battery current (a) 8500 6500 4500 2500 3.7 3.8 3.9 4.0 4.1 4.2 4.3 3.6 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 500 10,500 v in = 5v r seti = 4.02k i r dni = 3.57k i c ct = 0.47f 1300mah battery cc done cv v bat i bat i in max8900_ charge profile (charger restart) max8900a toc30 time (s) voltage (v) battery current (a) 8000 6000 4000 2000 3.7 3.8 3.9 4.0 4.1 4.2 4.3 3.6 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 0 10,000 v in = 5v r seti = 4.02k i r dni = 3.57k i c ct = 0.47f 1300mah battery done done cv v bat i bat i in maxim integrated
12 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c typical operating characteristics (continued) (circuit of figure 1, v in = 6v, v bat = 3.6v, t a = +25nc, unless otherwise noted.) 5v in connect max8900a toc31 0a r seti = 6.81ki 2v/div 5v/div 500ma/div i bat v lx v in 400s/div battery connect max8900a toc32 0a r seti = 2.87ki 1.2a 3.6v 4.2v 6v 5v/div 2v/div 500ma/div i bat v bat v in 20s/div battery disconnect max8900a toc33 0a r seti = 2.87ki 4.2v 3.6v 1.2a 6v 5v/div 2v/div 500ma/div i bat v bat v in 400s/div soft-start into resistive source, r seti = 6.81ki max8900a toc34 0a 2v/div 2v/div v source = 4.8v, v bat = 4v 1i between source and in 500ma/div i bat v lx v in 2ms/div soft-start into resistive source (r seti = 2.87ki) max8900a toc35 0a 5v/div 2v/div v source = 4.8v, v bat = 4v 1i between source and in 500ma/div i bat v lx v in 2ms/div maxim integrated
13 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c pin description pin configuration 30 wlp (0.4mm pitch) top view (bumps down) + a1 bat a2 cs a3 lx a4 pgnd a5 bst a6 pvl b1 bat b2 cs b3 lx b4 pgnd b5 pgnd b6 pgnd c1 stat2 c2 cen c3 inbp c4 inbp c5 inbp c6 inbp d1 stat1 d2 stat3 d3 in d4 in d5 in d6 in e1 dni e2 seti e3 ct e4 thm e5 avl e6 gnd pin name function a1, b1 bat connection to battery. connect to a single-cell li+/li-poly battery from bat to pgnd. connect both bat pins together externally. bypass bat to pgnd with a 2.2ff ceramic capacitor. a2, b2 cs 40mi current-sense node. connect the inductor from lx to cs. connect both cs pins together externally. a3, b3 lx inductor switching node. connect the inductor between lx and cs. connect both lx pins together externally. when enabled (cen = 0), lx switches between inbp and pgnd to control the battery charging. when disabled (cen = 1), the lx switches are high-impedance however they still have body diodes as shown in figure 3. a4, b4, b5, b6 pgnd power ground for step-down low-side synchronous n-channel mosfet. connect all pgnd pins together externally. a5 bst supply for high-side n-channel gate driver. bypass bst to lx with a 0.1ff ceramic capacitor. a6 pvl 5v linear regulator to power internal circuits. pvl also charges the bst capacitor. bypass pvl to pgnd with a 1.0ff ceramic capacitor. powering external loads from pvl is not recommended. c1 stat2 status output 2. stat2 is an open-drain output that has a 30v absolute maximum rating and a typical pulldown resistance of 25i. for the max8900a, stat1 and stat2 indicate different states as shown in table 4. for the max8900b/max8900c, stat1, stat2, and stat3 indicate different operating states of the max8900_ as shown in table 3. c2 cen charge enable input. cen has an internal 200ki pulldown resistor. pull cen low or leave it unconnected to enable the max8900_. drive cen high to disable the max8900_. note: v in must be greater than v uvlo-rising for the max8900_ to operate when cen is pulled low. for example, if cen is low and the max8900_ is operating with v uvlo-falling < v in < v uvlo-rising , then toggling cen results in a nonoperating condition. maxim integrated
14 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c pin description (continued) pin name function c3Cc6 inbp power input bypass. connect all inbp pins together externally. bypass inbp to pgnd with a 0.47ff ceramic capacitor. d1 stat1 status output 1. stat1 is an open-drain output that has a 30v absolute maximum rating and a typical internal pulldown resistance of 25i. for the max8900a, stat1 and stat2 indicate different states as shown in table 4. for the max8900b/max8900c, stat1, stat2, and stat3 indicate different operating states of the max8900_ as shown in table 3. d2 stat3 status output 3. stat3 is an open-drain output that is a 6v absolute maximum rating and a typical pulldown resistance of 10i. for the max8900a, stat1 and stat2 indicate different states as shown in table 4. for the max8900b/max8900c, stat1, stat2, and stat3 indicate different operating states of the max8900_ as shown in table 3. d3Cd6 in power input. in is capable of delivering 1.2a to the battery and/or system. connect all in pins together externally. bypass in to pgnd with a 0.47ff ceramic capacitor. e1 dni done/prequalification program input. dni is a dual function pin that sets both the done current threshold and the prequalification charge rate. connect a resistor from dni to gnd to set the threshold between 10ma and 200ma. dni is pulled to gnd during shutdown. e2 seti fast-charge current program input. connect a resistor from seti to gnd to set the fast-charge current from 0.05a to 1.2a. seti is pulled to gnd during shutdown. e3 ct charge timer set input. a capacitor (c ct ) from ct to gnd sets the prequalification/dead-battery and fast-charge fault timers. use 0.1ff for 180-minute fast-charge time limit and 30-minute prequalification/dead-battery time limit. connect to gnd to disable the timer. e4 thm thermistor input. connect a negative temperature coefficient (ntc) thermistor from thm to gnd. connect a resistor equal to the thermistors +25nc resistance from thm to avl. thermistor adjusts the charge current and termination voltage as described in the jeita specification for safe use of secondary li+ batteries. see figure 10. to disable the thm operation, bias v thm midway between avl and gnd. e5 avl 5v linear regulator to power low-noise internal circuits. bypass avl to gnd with a 0.1ff ceramic capacitor. powering external loads from avl is not recommended. e6 gnd ground. gnd is the low-noise ground connection for the internal circuitry. see the pcb layout section for more details. maxim integrated
15 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c figure 1. applications circuit: single seti resistor, status indicators connected to leds figure 2. applications circuit: multiple charge rates managed by p to be usb compliant, status indicators connected to a p max8900_ 1fh 1.5a li+/ li-poly system load bst lx 2.2ff 6.3v 0603 0.1ff 6.3v 0201 0.47ff 25v 0603 0.47ff 6.3v 0402 3.57ki 0201 10ki 0201 10ki 3380k 0402 422i 422i 422i 2.87ki 0201 0.47ff 25v 0603 0.1ff 10v 0402 v in range: -22v to +22v 1.0ff 6.3v 0402 off on in stat1 stat2 stat3 cen pvl inbp ct seti dni thm t gnd avl bat pgnd bat pgnd * status indicators are unconnected for the electrical characteristics table. the minimum acceptable eia component sizes as of late 2009 are listed: 0201, 0402, 0603. gnd bat in cs * * * 0.1ff 10v 0402 max8900_ 1fh 1.5a li+/ li-poly system load bst lx 2.2ff 6.3v 0603 fp 0.1ff 6.3v 0201 0.47ff 6.3v 0402 1.0ff 6.3v 0402 3.57ki 0201 9.09ki 0201 35.7ki 0201 4.75ki 0201 10ki 0201 10ki 3380k 0402 0.47ff 25v 0603 0.47ff 25v 0603 in stat1 inbp stat2 stat3 cen seti ct pvl dni thm t gnd avl bat pgnd pgnd the minimum acceptable eia component sizes as of late 2009 are listed: 0201, 0402, 0603. gnd cs vbus d- d+ id gnd gpio1* 375ma_en 717ma_en gpio5 gpio6 usb transceiver usb connector gpio2* gpio3* gpio4* suspend is 0ma fast-charge current (i fc ) and 40fa of input current (i in ). gpio4 cen 1x xx r th (i)i fc (a) 00 35700 0.095 10 7245 0.470 01 4192 0.812 11 2869 1.187 suspend 0 0 0 0 9090 4750 gpio5 gpio6 *pullup resistors are internal to the p. maxim integrated
16 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c figure 3. functional diagram t max8900_ pgnd gnd stat1: d1 bv = 30v stat2: c1 bv = 30v stat3: d1 bv = 6v gnd: e6 ct: e3 cen: c2 pvl: a6 avl: e5 seti: e2 dni: e1 thm: e4 r cen r avl 12.5i v dbat r sns r ls r hs v in2bat v uvlo v ovlo pvl avl ibat bat bat_i bat_v bat_t bat bat: b1 bat: a1 cs: b2 cs: a2 pgnd: b6 pgnd: b5 pgnd: b4 pgnd: a4 lx: b3 lx: a3 bst: a5 inbp: c6 inbp: c5 inbp: c4 inbp: c3 in: d6 in: d5 in: d4 in: d3 ibat pvl pvl bat li2b uvlo ovlo reverse- input protection low in to bat voltage dc-dc charge controller logic cts charger timer input overvoltage input undervoltage cold: t1 thermometer decode logic dead-battery charger (i dbat ) die temperature cool: t2 warm: t3 hot: t4 bat_t bat_t die_t drv_out fc_i pq_i to_i shdn avl avl is the internal analog supply in in in in out en 5v 30ma ldo en out maxim integrated
17 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c detailed description the max8900_ is a full-featured, high-frequency switch- mode charger for a 1-cell li+ or li-poly battery. it delivers up to 1.2a to the battery from 3.4v to 6.3v (max8900a/max8900c) or 3.4v to 8.7v (max8900b). contact the factory for input operating voltage ranges up to +20v. the 3.25mhz switch-mode charger is ide - ally suited to small portable devices such as headsets and ultra-portable media players because it minimizes component size and heat. several features make the max8900_ ideal for high reli - ability systems. the max8900_ is protected against input voltages as high as +22v and as low as -22v. battery protection features include low voltage prequalification, charge fault timer, die temperature monitoring, and bat- tery temperature monitoring. the battery temperature monitoring adjusts the charge current and termination voltage as described in the jeita (japan electronics and information technology industries association) speci - fication for safe use of secondary li+ batteries. the full title of the standard is a guide to the safe use of secondary lithium ion batteries in notebook-type personal computers, april 20, 2007 . charge parameters are easily adjustable with external components. an external resistance adjusts the charge current from 50ma to 1200ma. another external resis - tance adjusts the prequalification and done current thresholds from 10ma to 200ma. the done current thresh - old is very accurate achieving q 1ma at the 10ma level. the charge timer is adjustable with an external capacitor. control scheme a proprietary hysteretic current pwm control scheme ensures high efficiency, fast switching, and physically tiny external components. inductor ripple current is internally set to provide 3.25mhz. at very high duty factors, when the input voltage is lowered close to the output volt - age, the steady-state duty ratio does not allow 3.25mhz operation because of the minimum off-time. the controller then provides minimum off-time, peak current regula - tion. similarly, when the input voltage is too high to allow 3.25mhz operation due to the minimum on-time, the con - troller becomes a minimum on-time, valley current regula- tor. in this way, the ripple current in the inductor is always as small as possible to reduce the output ripple voltage. the inductor ripple current is made to vary with input and output voltage in a way that reduces frequency variation. soft-start to prevent input current transients, the rate of change of the input current (di/dt) and charge current is limited. when the input is valid, the charge current ramps from 0ma to the fast-charge current value in 1.5ms. charge current also soft-starts when transitioning from the prequalification state to the fast-charge state. there is no di/dt limiting when transitioning from the done state to the fast-charge state (figures 7 and 8). similarly, if r seti is changed suddenly when using a switch or vari - able resistor at seti as shown in figure 2 there is no di/ dt current limiting. setting the fast-charge current (seti) as shown in figure 4, a resistor from seti to ground (r seti ) sets the fast-charge current (i fc ). the max8900_ supports values of i fc from 50ma to 1200ma. select r seti as follows: i fc = 3405v/r seti determine the optimal i fc for a given system by consid - ering the characteristics of the battery and the capabili - ties of the charge source. example 1: if you are using a 5v q5% 1a charge source along with an 800mah battery that has a 1c fast-charge rating, then choose r seti to be 4.42ki q1%. this value provides a typical charge current of 770ma. given the q2% six sigma limit on the max8900_ fast-charge current accuracy along with the q 1% accuracy of the resistor, we can reasonably expect that the 770ma typical value has an accuracy of q2.2% (2.2 sqrt(2 2 + 1 2 )) or q17ma. furthermore, since the max8900_ charger uses a step-down con - verter topology, we can guarantee that the input cur - rent is less than or equal to the output current so we do not violate the 1a rating of the charge source. depending on its mode of operation, the max8900_ controls the voltage at seti to be between 0v and 1.5v. avoid adding capacitance directly to the seti pin that exceeds 10pf. as a protection feature, if the battery temperature is between the t2 and t4 thresholds and seti is shorted to ground, then the max8900_ latches off the battery charger and enters the timer fault state. this protection feature is disabled outside of fast-charge, top-off, done mode and inside thermal foldback. furthermore, if seti is unconnected, then the battery fast-charge current is 0a. maxim integrated
18 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c setting the prequalification current and done threshold (dni) as shown in figure 5, a resistor from dni to ground (r dni ) sets the prequalification current (i pq ) and done current (i dn ). the max8900_ supports values of r dni from 1.19ki to 38.2ki. select r dni as follows: i dn = 384v/r dni i pq = 415v/r dni determine the optimal i pq and i dn for a given system by considering the characteristics of the battery. depending on its mode of operation, the max8900_ controls the voltage at dni from 0 to 1.5v. avoid adding capacitance directly to the seti pin that exceeds 10pf. as shown in figure 10, the prequalification current and done threshold is set to 50% of programmed value when t1 < thm < t2, and 100% of programmed value when t2 < thm < t4. as a protection feature, if the battery temperature is between the t2 and t4 thresholds and dni is shorted to ground, then the max8900_ latches off the battery charger and enters the timer fault state. this protection feature is disabled inside of dead-battery mode and thermal foldback. furthermore, if dni is unconnected, then the prequalification and done current is 0a and the charge timer prevents the max8900_ from indefinitely operating in its done state. charge enable input (cen) cen is a digital input. driving cen high disables the battery charger. pull cen low or leave it unconnected figure 4. fast-charge current vs. r seti (www.maxim-ic.com/ tools/other/software/max8900-rseti.xls) figure 5. prequalification current and done threshold vs. r dni (www.maxim-ic.com/tools/other/software/max8900-dni.xls) fast-charge current vs. r seti r seti (ki) fast-charge current (a) 60 40 20 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 08 0 prequalification and done current vs. r dni r dni (ki) current (ma) 10 50 100 150 200 250 0 0 100 i pq i dn r seti (ki) i fc (a) r seti (ki) i fc (a) r seti (ki) i fc (a) 2.87 1.186 7.15 0.476 24.9 0.137 3.01 1.131 7.32 0.465 27.4 0.124 3.16 1.078 7.87 0.433 30.1 0.113 3.32 1.026 8.25 0.413 32.2 0.106 3.57 0.954 9.09 0.375 34.0 0.100 3.92 0.869 10.0 0.341 35.7 0.095 4.12 0.826 11.0 0.310 39.2 0.087 4.32 0.788 12.1 0.281 43.2 0.079 4.42 0.770 13.0 0.262 45.5 0.075 4.75 0.717 14.0 0.243 49.9 0.068 4.99 0.682 15.0 0.227 51.1 0.067 5.11 0.666 16.2 0.210 56.2 0.061 5.62 0.606 18.2 0.187 61.9 0.055 6.19 0.550 20.0 0.170 66.5 0.051 6.81 0.500 22.1 0.154 68.1 0.050 7.5 0.454 24.3 0.140 r dni (ki) i pq (ma) i dn (ma) r dni (ki) i pq (ma) i dn (ma) 1.91 217.3 201.0 7.5 55.3 51.2 2.37 175.1 162.0 7.68 54.0 50.0 3.48 119.3 110.3 7.87 52.7 48.8 3.57 116.2 107.6 10.0 41.5 38.4 3.83 108.4 100.3 14.3 29.0 26.9 4.42 93.9 86.9 20.0 20.8 19.2 5.9 70.3 65.1 28.0 14.8 13.7 7.32 56.7 52.5 39.2 10.6 9.8 maxim integrated
19 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c to enable the max8900_. cen has an internal 200k i pulldown resistor. when disabled, the max8900_ supply current is reduced, the step-down converter high-side and low-side switches are off, and the avl is disabled. in many systems, there is no need for the system control - ler (typically a microprocessor (fp)) to disable the char- ger because the max8900_ independently manages the charger. in these situations, cen can be connected to ground or left unconnected. note: if cen is permanently connected to ground or left unconnected, the input power must be cycled to escape from a timer fault state (see figures 7 and 8 for more information). v in must be greater than v uvlo-rising for the max8900_ to operate when cen is pulled low. for example, if cen is low and the max8900_ is operating with v uvlo-falling < v in < v uvlo-rising , then toggling cen results in a nonoperating condition. charger states the max8900_ utilizes several charging states to safely and quickly charge batteries as shown in figure 7. figure 6 shows an exaggerated view of a li+/li-poly battery progressing through the following charge states when the die and battery are close to room temperature: dead battery prequalification fast-charge top-off done. figure 6. li+/li-poly charge profile v pq ut h v batre g i chg p i set i dbat + i pq i dbat 0 i pq v pq lt h v dbat time time battery charge current battery voltage dead battery dead battery + prequalification prequalification fast-charge (constant current) fast-charge (constant voltage) top-off done maxim integrated
20 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c figure 7. charger state diagram (3-pin status) no pwr or charger disabled stat1 = hi-z stat2 = hi-z stat3 = hi-z i bat = 0 any stat e cen = logic-high or t j > t shdn v in > v uvlo and v in > v bat + v in2bat and t j < t shdn (set timer = 0) v bat < v pqlth v bat < v dbat v in < v ovlo timer = resume v in > v ovlo timer = suspend thermistor < t1 timer = suspend thermistor > t1 timer = resume thermistor > t4 timer = suspend thermistor < t4 timer = resume v bat > v dbat timer > t pq timer > t fc timer > t pq v bat > v pqlth v bat < v pquth (set timer = 0) i bat > i dn + 1ma (set timer = 0) i bat < i dn v bat > v pquth soft-start (set timer = 0) v bat < v rstrt no soft-start (set timer = 0) timer > t to v in < v uvlo or < v bat + v in2bat dead bat + prequal stat1 = low stat2 = hi-z stat3 = low i bat = i dbat + i pq prequal stat1 = low stat2 = hi-z stat3 = low i bat = i pq fast chg stat1 = low stat2 = hi-z stat3 = low i bat = i fc top-off stat1 = low stat2 = hi-z stat3 = low done stat1 = hi-z stat2 = low stat3 = low i bat = 0 dead bat stat1 = low stat2 = hi-z stat3 = low i bat = i dbat timer > t pq timer fa ult stat1 = hi-z stat2 = hi-z stat3 = low i bat = 0 v in too high stat1 = low stat2 = low stat3 = hi-z i bat = 0 any charging stat e (dead bat, prequal, fast chg, or top-off) batte ry cold stat1 = low stat2 = low stat3 = low i bat = 0 if v bat > v dbat battery hot stat1 = low stat2 = hi-z stat3 = hi-z i bat = 0 if v bat > v dbat maxim integrated
21 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c figure 8. charger state diagram (2-pin status) no pwr or charger disabled stat1 = hi-z stat2 = hi-z i bat = 0 any stat e cen = logic-high or t j > t shdn v in > v uvlo and v in > v bat + v in2bat and t j < t shdn (set timer = 0) v bat < v pqlth v bat < v dbat v in < v ovlo timer = resume v in > v ovlo timer = suspend thermistor > t4 or thermistor < t1 timer = suspend t1 < thermistor < t4 timer = resume v bat > v dbat timer > t pq timer > t fc timer > t pq v bat > v pqlth v bat < v pquth (set timer = 0) i bat > i dn + 1ma (set timer = 0) i bat < i dn v bat > v pquth soft-start (set timer = 0) v bat < v rstrt no soft-start (set timer = 0) timer > t to v in < v uvlo or < v bat + v in2bat dead bat + prequal stat1 = low stat2 = hi-z i bat = i dbat + i pq prequal stat1 = low stat2 = hi-z i bat = i pq fast chg stat1 = low stat2 = hi-z i bat = i fc top-off stat1 = low stat2 = hi-z done stat1 = hi-z stat2 = hi-z i bat = 0 dead bat stat1 = low stat2 = hi-z i bat = i dbat timer > t pq timer fa ult stat1 = hi-z stat2 = low i bat = 0 v in too high stat1 = hi-z stat2 = low i bat = 0 any charging stat e (dead bat, prequal, fast chg, or top-off) batte ry cold/ batte ry hot stat1 = hi-z stat2 = low i bat = 0 if v bat > v dbat maxim integrated
22 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c charger disabled state when cen is high or the input voltage is out of range, the max8900_ disables the charger. to exit this state, cen must be low and the input voltage must be within its valid range. dead-battery state when a deeply discharged battery is inserted with a voltage of less than v pqlth , the max8900_ disables the switching charger and linearly charges with i dbat . if the max8900_ remains in this dead-battery state for longer than t pq , then it transitions to the timer fault state. this dead-battery state prevents the max8900_ from dissi - pating excessive power in the event of a shorted battery. once v bat increases beyond v pqlth, the max8900_ transitions to the dead battery + prequalification state. dead battery + prequalification state the dead battery + prequalification state occur when the battery voltage is greater than v pqlth and less than v dbat . in this state, both the linear dead-battery charger and the switching charger are on and delivering current to the battery. the total battery current is i dbat + i pq . if the max8900_ remains in this state for longer than t pq , then it transitions to the timer fault state. a normal bat - tery typically stays in the dead-battery + prequalification state for several minutes or less and when the battery voltage rises above v dbat , the max8900_ transitions to the prequalification state. prequalification state the prequalification state occurs when the battery volt - age is greater than v dbat and less than v pquth . in this state, the linear dead-battery charger is turned off and only the switching charger is on and delivering current to the battery. the total battery current is i pq . if the max8900_ remains in this state for longer than t pq , then the max8900_ transitions to the timer fault state. a normal battery typically stays in the prequalification state for several minutes or less and when the battery voltage rises above v pquth , the max8900_ transitions to the fast-charge constant current state. as shown in figure 10, the prequalification current and done threshold is set to 50% of programmed value when t1 < thm < t2, and 100% of programmed value when t2 < thm < t4. fast-charge constant current state the fast-charge constant current state occurs when the battery voltage is greater than v pquth and less than v batreg . in this state, the switching charger is on and delivering current to the battery. the total battery current is i fc . if the max8900_ remains in this state and the fast- charge constant voltage state for longer than t fc , then the max8900_ transitions to the timer fault state. when the battery voltage rises to v batreg , the max8900_ transitions to the fast-charge constant voltage state. as shown in figure 10, the fast-charge constant current is set to 50% of programmed value when t1 < thm < t2, and 100% of programmed value when t2 < thm < t4. the max8900_ dissipates the most power in the fast- charge constant current state. this power dissipation causes the internal die temperature to rise. if the die tem - perature exceeds t reg , i fc is reduced. see the thermal foldback section for more detail. if there is low input voltage headroom (v in - v bat ), then i fc decreases due to the impedance from in to bat. see figure 13 for more detail. fast-charge constant voltage state the fast-charge constant voltage state occurs when the battery voltage is at the v batreg and the charge current is greater than i dn . in this state, the switching charger is on and delivering current to the battery. the max8900_ maintains v batreg and monitors the charge current to detect when the battery consumes less than the i dn cur- rent. when the charge current decreases below the i dn threshold, the max8900_ transitions to the top-off state. if the max8900_ remains in the fast-charge constant current state and this state for longer than t fc , then the max8900_ transitions to the timer fault state. please note when the battery temperature is between t3 and t4 the bat regulation voltage is reduced to 4.075v. the max8900_ offers an adjustable done current thresh - old (i dn ) from 10ma to 200ma. the accuracy of the top-off current threshold is q1ma when it is set for 10ma. this accurate threshold allows the maximum amount of charge to be stored in the battery before the max8900_ transitions into done state. top-off state the top-off state occurs when the battery voltage is at v batreg and the battery current decreases below i dn . in this state, the switching charger is on and deliv - ers current to the battery. the max8900_ maintains v batreg for a specified time (t to ). when t to expires, the max8900_ transitions to the done state. if the charg - ing current increases to i dn + 1ma before t to expires, then the charger re-enters the fast-charge constant volt - age state. maxim integrated
23 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c done state the max8900_ enters its done state after the charger has been in the top-off state for t to . in this state, the switching charger is off and no current is delivered to the battery. although the charger is off, the seti and dni pins are biased in the done state and the max8900_ consumes the associated current from the battery (i bat = 1.5v/r seti + 1.5v/r dni + 3fa). if the system load presented to the battery is low (<< 100 fa), then a typi - cal system can remain in the done state for many days. if left in the done state long enough, the battery voltage decays below the restart threshold (v rstrt ) and the max8900_ transitions back into the fast-charge state. there is no soft-start (di/dt limiting) during the done-to- fast-charge state transition. timer fault state the timer fault state occurs when either the prequalifica - tion or fast-charge timers expire, or seti/dni is shorted to ground (see the setting the fast-charge current (seti) and setting the prequalification current and done threshold (dni) sections for more details). in this state the charger is off. the charger can exit the timer fault state by either cycling cen or input power. battery hot/cold state the battery hot/cold state occurs when the max8900_ is in any of its charge states (dead battery, prequalification, fast-charge, top-off) and thermistor temperature is either less than t1 or greater than t4. in this state, the charger is off and timers are suspended. the max8900_ exits the temperature suspend state and returns to the state it came from once the thermistor temperature is greater than t1 and less than t4. the timer resumes once the max8900_ exits this state. v in too high state the v in too high state occurs when the max8900_ is in any of its charge states (dead battery, prequalification, fast-charge, top-off) and v in exceeds v ovlo . in this state, the charger is off and timers are suspended. the max8900_ exits the v in too high state and returns to the state it came from when v in decreases below v ovlo . the timer resumes once the max8900_ exits this state. charge timer (ct) as shown in figure 7, a fault timer prevents the battery from charging indefinitely. in the dead-battery, prequali - fication, and fast-charge states, the timer is controlled by the capacitance at ct (c ct ). the max8900_ sup - ports values of c ct from 0.01 ff to 1.0 ff. calculate the prequalification time (t pq ) and fast-charge time (t fc ) as follows (figure 9): ct pq c t 30min 0.1 f = f ct fc c t 180min 0.1 f = f the top-off time (t to ) is fixed at 16s: to t 16s = connect ct to gnd to disable the prequalification/dead- battery and fast-charge timers. with the internal timers of the max8900_ disabled, an external device, such as a fp can control the charge time through the cen input. thermal management the max8900_ is packaged in a 2.44mm x 2.67mm x 0.64mm, 0.4mm pitch wlp package and withstands a junction temperature of +150 n c. the max8900_ is rated for the extended ambient temperature range from -40n c to +85n c. table 1 and application note 1891: wafer-level packaging (wlp) and its applications ( www.maximintegrated.com/ucsp ) show the thermal characteristics of this package. the max8900_ uses figure 9. charge times vs. c ct charge times vs. charge timer capacitor c ct (nf) charge times (min) 800 t pq t fc 600 200 400 2000 1800 1600 1400 1200 1000 800 600 400 200 0 0 1000 c ct (nf) t pq (min) t fc t to (s) (min) (hrs) 68 20.4 122.4 2 16 100 30.0 180.0 3 16 150 45.0 270.0 4.5 16 220 66.0 396.0 6.6 16 470 141.0 846.0 14.1 16 1000 300.0 1800.0 30.0 16 maxim integrated
24 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c several thermal management techniques to prevent excessive battery and die temperatures. thermistor monitor (thm) the max8900_ adjusts the charge current and termina- tion voltage as described in the jeita specification for safe use of secondary li+ batteries ( a guide to the safe use of secondary lithium ion batteries in notebook-type personal computers, april 20, 2007 ). as shown in figure 10, there are four temperature thresholds that change the battery charger operation: t1, t2, t3, and t4. when the thermistor input exceeds the extreme temperatures (< t1 or > t4), the charger shuts off and all respective charging timers are suspended. while the thermistor remains out of range, no charging occurs, and the timer counters hold their state. when the thermistor input comes back into range, the charge timers continue to count. the middle thresholds (t2 and t3) do not shut the charger off, but adjust the current/voltage targets to maximize charging while reducing battery stress. between t3 and t4, the voltage target is reduced (see v batreg in the electrical characteristics table); how- ever, the charge timers continue to count. between t1 and t2, the charging current target is reduced to 50% of its normal operating value; and similarly the charge timers continue to count. if the thermistor functionality is not required, connect a 1mi resistor from thm to avl and another 1mi resis- tor from thm to gnd. this biases the thm node to be ? of the avl voltage telling the max8900_ that the bat - tery temperature is between the t2 and t3 temperature range. furthermore, the high 2m i impedance presents a minimal load to avl. table 2 shows that the max8900_ is compatible with several standard thermistor values. when using a 10k i thermistor with a beta of 3380k, the configuration of figure 11a provides for temperature trip thresholds that are very close to the nominal t1, t2, t3, and t4 (see the electrical characteristics table). when using alternate resistance and/or beta thermistors, the circuit of figure 11a may result in temperature trip thresholds that are different from the nominal values. in this case, the circuit of figure 11b allows for compensating the thermistor to shift the temperature trip thresholds back to the nomi - nal value. in general, smaller values of r tp shift all the temperature trip thresholds down; however, the lower temperature thresholds are affected more then the higher temperature thresholds. furthermore, larger values of r ts shift all the temperature trip thresholds up; however, the higher temperature thresholds are affected more than the lower temperature thresholds. for assistance with therm - istor calculations, use the spreadsheet at the following link: www.maximintegrated.com/tools/other/software/ max8900-thermistor.xls the general relation of thermistor resistance to tempera - ture is defined by the following equation: 11 - t 273 c 298 c thrm 25 r r xe ?? ?? ?? ?? + ?? ?? = nn where: r thrm = the resistance in i of the thermistor at tem- perature t in celsius. r 25 = the resistance in i of the thermistor at t a = +25n c. ? = the material constant of the thermistor, which typically ranges from 3000k to 5000k. t = the temperature of the thermistor in nc. table 1. 2.44mm x 2.67mm x 0.64mm, 0.4mm pitch wlp thermal characteristics four-layer pcb (jesd51-9:2s2p) continuous power dissipation 1619mw derate 20.2mw/nc above +70nc/w b ja 49.4nc/w b jc 9nc/w board parameters ? still air ? 4-layer board ? 1.5oz copper on outer layers ? 1oz copper on inner layers ? 1.6mm thick board (62mil) ? 4in x 4in board ? four center thermal vias ? fr-4 maxim integrated
25 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c table 2. trip temperatures for different thermistors figure 10. jeita battery safety regions thermistor temperature r thrm at t a = +25nc 10,000 10,000 10,000 47,000 47,000 100,000 100,000 thermistor beta (?[i]) 3380 3940 3940 4050 4050 4250 4250 rtb (i) 10,000 10,000 10,000 47,000 47,000 100,000 100,000 rtp (i) open open 301,000 open 1,200,000 open 1,800,000 rts (i) short short 499 short 2,400 short 6,800 resistance at t1_n15 (i) 61,788 61,788 77,248 290,410 380,716 617,913 934,027 resistance at t1_0 (i) 29,308 29,308 31,971 137,750 153,211 293,090 343,283 resistance at t2 (i) 15,000 15,000 15,288 70,500 72,500 150,002 156,836 resistance at t3 (i) 5,309 5,309 4,906 24,954 23,083 53,093 47,906 resistance at t4 (i) 2,910 2,910 2,439 13,676 11,434 29,099 22,777 temperature at t1_n15 (nc) [-15nc nom] -16.2 -11.1 -14.9 -10.2 -14.8 -8.7 -15.4 temperature at t1_0 (nc) [0nc nom] -0.8 2.6 0.9 3.2 1.2 4.1 1.3 temperature at t2 (n c) [+15nc nom] 14.7 16.1 15.7 16.4 15.8 16.8 15.9 temperature at t3 (nc) [+45nc nom] 42.6 40.0 42.0 39.6 41.5 38.8 41.2 temperature at t4 (nc) [+60nc nom] 61.4 55.7 60.6 54.8 59.6 53.2 59.2 battery temperature (c ) 25 15 45 60 85 3405v battery temperature (c ) 4.2v 4.1v* bat regulation voltage (v) 4.2 4.1 4.0 -40 -40 t4 t3 t2 t1 25 15 45 60 85 t4 t3 t2 t1 4.075 v *contact factory for a 4.1v option for v batreg . i fc = 3405v r seti t1 = 0c for max8900a/max8900c t1 = -15c for max8900b charge current (a) i fc = 2 x r seti i pq = 415v 2 x r dni 415v r dni i pq = i dbat maxim integrated
26 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c figure 11. thermistor monitor detail thermal foldback thermal foldback maximizes the battery charge current while regulating the max8900_ junction temperature. as shown in figure 12, when the die temperature exceeds t reg , a thermal limiting circuit reduces the battery charge-current target by a treg , until the charge cur - rent reaches 25% of the fast-charge current setting. the charger maintains 25% of the fast-charge current until the die temperature reaches t shdn . please note that the max8900_ is rated for a maximum ambient tempera - ture of +85 nc. furthermore, although the maximum die temperature of the max8900_ is +150 nc, it is common industry practice to design systems in such a way that the die temperature never exceeds +125 nc. limiting the maximum die temperature to +125 nc extends long-term reliability. thermal shutdown as shown in figure 12, when the max8900_ die tempera- ture exceeds t shdn , the ic goes into thermal shutdown. during shutdown, the step-down charger is off and all internal blocks except the bias circuitry is turned off. once the junction has cooled by 15 n c, the ic resumes operation. figure 12. charge current vs. junction temperature t cold: t1 avl is the internal analog supply to dc-dc charge controller avl: e5 a. basic thermistor configuration b. advanced thermistor configuration avl bat_t thm: e4 r thrm r tb thermometer decode logic cool: t2 warm: t3 hot: t4 max8900_ t cold: t1 avl is the internal analog supply to dc-dc charge controller avl: e5 avl bat_t thm: e4 r thrm r tp r ts r tb thermometer decode logic cool: t2 warm: t3 hot: t4 max8900_ charge current vs. junction temperature t j (c) i chg (a) 150125 75 100 50 175 i fc = 1.19a i fc = 0.756a t2 < v thm < t3 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 maxim integrated
27 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c table 3. 3-pin status output truth table table 4. 2-pin status output truth table note: stat1, stat2, and stat3 are open-drain outputs. 0 indicates that the output device is pulling low. 1 indicates that the output is high impedance. note: stat1 and stat2 are open-drain outputs. 0 indicates that the output device is pulling low. 1 indicates that the out - put is high impedance. pvl and avl regulator pvl is a 5v linear regulator that the max8900_ uses to power the gate drivers for its step-down charger. pvl also charges the bst capacitor. the pvl linear regulator is on when cen is low, v in is greater than ~2v, and v in is above v bat by the v in2bat threshold, otherwise it is off. bypass pvl with a 1ff ceramic capacitor to gnd. powering external loads from pvl is not recommended. as shown in figure 3, avl is a filtered output from the pvl linear regulator that the max8900_ uses to power its internal analog circuits. the filter consists of an internal 12.5i resistor and the avl external bypass capacitor (0.1f f). this filter creates a 127khz lowpass filter that cleans the 3.25mhz switching noise from the analog por- tions of the max8900_. connect a 0.1 ff ceramic capaci - tor from avl to gnd. powering external loads with avl is not recommended. charge status outputs (3 pin) stat1, stat2, and stat3 are open-drain outputs that indicate the status of the max8900b/max8900c as shown in table 3. when the status outputs are used to communicate with a f p, pull them up to the system logic voltage (v logic ) to create a signal that has a logic-high and logic-low state that the f p can easily interpret (figure 2). since more than one status signal may change when the max8900b/max8900c changes states, the f p must implement a deglitching routine for the interpretation of the status signals. when the status outputs are used to drive led indicators, a series resistor should limit the led current to be less than 30ma (figure 1). the stat1 and stat2 typical pull - down resistance is 25 i and the absolute maximum rating is +30v. this +30v rating allows in to be used to bias stat1 and stat2. the stat3 typical pulldown resis - tance is 10i and the absolute maximum rating is +6v. charge status outputs (2 pin + > t4) stat1 and stat2 are open-drain outputs that indicate the status of the max8900a as shown in table 4. when the status outputs are used to communicate with a fp, pull them up to the system logic voltage (v logic ) to create a signal that has a logic-high and logic-low state that the fp can easily interpret (figure 2). since more than one status signal may change when the max8900a changes states, the fp must implement a deglitching routine for the interpretation of the status signals. when the status outputs are used to drive led indica - tors, a series resistor should limit the led current to be less than 30ma (figure 1). note that the stat1 and stat2 typical pulldown resistance is 25 i and the abso- lute maximum rating is +30v. this +30v rating allows in to be used to bias stat1 and stat2. stat3 pulls low when the battery temperature moni- tor detects that the battery temperature is greater than the t4 threshold, otherwise, stat3 is high impedance. some systems may want to reduce the battery loading when stat3 pulls low to prevent the battery from getting excessively hot. stat1 stat2 stat3 indication 0 0 0 battery cold (thm < t1) 0 0 1 v in > v ovlo 0 1 0 charging (dead-battery state or dead battery + prequalification state or prequalification state or fast-charge state) 0 1 1 battery hot (thm >t4) 1 0 0 done state 1 0 1 undefined. this state does not occur. 1 1 0 timer fault 1 1 1 v in < v uvlo or cen = 1 or v in < (v bat + v in2bat ) or thermal shutdown stat1 stat2 indication 0 0 undefined. this does not occur when the max8900_ is powered. 0 1 charging (dead-battery state or dead battery + prequalification state or prequalification state or fast- charge state) 1 0 timer fault or v in > v ovlo or bat- tery cold (thm < t1) or battery hot (thm > t4) 1 1 done state or cen = 1 or v in < v uvlo or v in < (v bat + v in2bat ) or thermal shutdown maxim integrated
28 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c inductor selection consider inductance, current rating, series resistance, physical size, and cost when selecting an inductor. these factors affect the converters efficiency, maximum output current, transient response time, and output volt - age ripple. tables 5 and 6 show suggested inductor values based upon input voltage and laboratory tests. when using the max8900_ with in voltages below 8.5v, select the inductor to be 1.0 fh. this keeps the inductor peak-to-peak ripple current to the average dc inductor current at the full load (lir) between 40% to 50%. if a lower ripple is desired, select an inductance from 2.2 fh to 10 f h. higher input voltages require higher inductors to maintain the same inductor current ripple. the trade-off between inductor size and converter effi - ciency for step-down regulators varies as the lir varies. lir is the ratio of the inductor peak-to-peak ripple current to the average dc inductor current at the full-load cur - rent. a higher lir value allows for smaller inductance, but result in higher losses and higher output voltage ripple. to reduce the power dissipation and improve transient response, choose an inductor that has a low dc series resistance as well as a low ac resistance at 3.25mhz. note that it is typical for low inductance inductors such as 1fh to have a q30% initial variation in inductance. furthermore, some physically smaller inductors show a substantial degradation in inductance with increased dc current. it is typical for inductor manufacturers to specify their saturation current at the level when the initial induc - tance decreases by 30% or at the level where the inter- nal inductor temperature rises +40 nc above the ambient temperature. because of differences in the way inductor manufacturers specify saturation current (i sat ), it is criti- cal that you study and understand your manufacturers specification criteria. table 5. recommended inductor selection table 6. recommended inductor dc input voltage range (v) recommended inductor for 40% lir 3.4 to 8.7 1 f h inductor, lqm2hpn1r0g0, murata, 2.5mm x 2.0mm x 0.9mm, 55m i , 1.6a. 8.7 to 15.8 1.5f h inductor, lqm2hpn1r5g0, murata, 2.5mm x 2.0mm x 0.9mm, 70m i , 1.5a 15.8 to 27.4 2.2f h inductor, lqm2hpn2r2g0, murata, 2.5mm x 2.0mm x 0.9mm, 80m i , 1.3a. manufacturer series inductance (h) esr (i) current ratings (a) dimensions coilcraft epl2014 1.0 0.059 1.68 2.0 x 2.0 x 1.4 = 5.6mm 3 1.5 0.075 1.60 2.2 0.120 1.30 murata lqm2mpn_g0 1.0 0.085 1.40 2.0 x 1.6 x 0.9 = 2.88mm 3 1.5 0.110 1.20 2.2 0.110 1.20 3.3 0.120 1.20 lqm2hpn_g0 1.0 0.055 1.60 2.5 x 2.0 x 0.9 =4.5mm 3 1.5 0.070 1.50 2.2 0.080 1.30 3.3 0.100 1.20 tdk mlp2520s 1.0 0.060 1.50 2.0 x 2.5 x 1.0 = 5mm 3 1.5 0.070 1.50 cpl2512 1.0 0.090 1.20 2.5 x 1.5 x 1.2 = 3.6mm 3 2.2 0.135 0.90 toko mdt2520-ch 1.0 0.110 1.20 2.5 x 2.0 x 1.0 = 5mm 3 1.5 0.140 1.10 2.2 0.16 1.05 mdt2520-cn 1.0 0.085 1.35 2.5 x 2.0 x 1.2 = 6mm 3 1.5 0.095 1.25 2.2 0.105 1.20 3.3 0.115 1.15 maxim integrated
29 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c if the input voltage approaches the bat voltage during fast-charge constant current state, the maximum current is no longer limited by the current loop, but by the drop- out resistance. the total dropout resistance is: r dropout = r in2inbp + r hs + r l + r sns = 0.120i + 0.100i + r l + 0.040i r dropout heavily depends upon the inductor esr (r l ). a low r l is required to maximize performance. bat capacitor choose the nominal bat capacitance to be 2.2 f f. the bat capacitor is required to keep the bat voltage ripple small and to ensure regulation loop stability. the bat capacitor must have low impedance at the switching frequency. ceramic capacitors with x5r or x7r dielectric are highly recommended due to their small size, low esr, and small temperature coefficients. for optimum load- transient performance and very low output voltage ripple, the bat capacitor value can be increased above 2.2 f f. as the case sizes of ceramic surface-mount capaci - tors decreases, their capacitance vs. dc bias voltage characteristic becomes poor. due to this characteristic, it is possible for 0603 capacitors to perform well while 0402 capacitors of the same value perform poorly. the max8900_ require a nominal bat capacitance of 2.2 f f, however, after initial tolerance, bias voltage, aging, and temperature derating, the capacitance must be greater than 1.5f f. with the capacitor technology that is available at the time the max8900_ was released to production, the bat capacitance is best achieved with a single ceramic capacitor (x5r or x7r) in an 0603 or 0805 case size. the capacitor voltage ratings should be 6.3v or greater. inbp capacitor choose the inbp capacitance (c inbp ) to be 0.47 f f. larger values of c inbp improve the decoupling for the dc-dc step-down converter, but they cause a larger in to inbp inrush current when the input adapter is connected. to limit the in inrush current (i in ) to the 2.4a maximum (see the absolute maximum ratings section), limit c inbp by the maximum input voltage slew rate (v insr ) on in: c inbp < 2.4a/v insr . c inbp reduces the current peaks drawn from the battery or input power source during switch-mode operation and reduces switching noise in the max8900_. the impedance of the input capacitor at the switching frequency should be very low. ceramic capacitors with x5r or x7r dielectric are highly recommended due to their small size, low esr, and small temperature coefficients. for optimum noise immunity and low input voltage ripple, the input capacitor value can be increased. to fully utilize the q 22v input capability of the max8900_, the inbp capacitor voltage rating must be 25v or greater. note that if v in falls below v bat , v inbp remains at the v bat potential (i.e., a -20v at in does not pull down inbp). because v inbp never goes negative, it is possible to use a polarized capacitor (maxim recommends a ceramic capacitor). inbp is a critical discontinuous current path that requires careful bypassing. in the pcb layout, place c inbp as close as possible to the power pins (inbp and pgnd) to minimize parasitic inductance. if making connections to the inbp capacitor through vias, ensure that the vias are rated for the expected input current so they do not contribute excess inductance and resistance between the bypass capacitor and the power pins. the expected inbp current is the same as the i sat (see the inductor selection section). see the pcb layout section for more details. the input capacitor must meet the input ripple current requirement imposed by the step-down converter. ceramic capacitors are preferred due to their low esr and resilience to surge currents. choose the inbp capacitor so that its tem - perature rise due to ripple-current does not exceed approxi - mately t a = +10n c. for a step-down regulator, the maxi - mum input ripple current is half of the output current. this maximum input ripple current occurs when the step-down converter operates as 50% duty cycle (v in = 2 x v bat ). other capacitors the minimum in capacitor (c in ) is 0.47 f f with a voltage rating of 25v or greater. note that although the max8900_ needs only 0.47f f, larger capacitors can be used. some specifications from usb-if require a 2.2 f f capacitor to have proper handshaking during otg operation. the bst figure 13. calculated fast-charge current vs. dropout voltage calculated fast-charge current vs. dropout voltage v in - v bat (v) fast-charge current (a) 0.80.6 0.2 0.4 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 1.0 r l = 300mi i fc = 500ma i fc = 1200ma r l = 40mi maxim integrated
30 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c capacitor (c bst ) is a 0.1 f f with a voltage rating of 10v or greater. if c bst is increased then maintain a ratio of less than 1:10 between c bst and c pvl . c bst stores charge to drive the high-side n-channel gate. the minimum avl capacitor is 0.1f f with a voltage rating of 6.3v. the mini- mum pvl capacitor is 1.0f f with a voltage rating of 6.3v. ceramic capacitors with x5r or x7r dielectric are highly recommended due to their small size, low esr, and small temperature coefficients. applications information dynamic charge current programming certain applications require dynamic programming of the charge current. for example, if the input supply is a usb source, then the system might need to adjust the charge current to support the 100ma and 500ma input current ratings dictated by the usb-if. figure 2 illustrates one approach to dynamically program the charge current. by driving the gates of two mosfet switches to logic-high or logic-low, a microprocessor (f p) connects or discon- nects different program resistors. this method allows for four different charge current values ranging from 95ma to 1187ma. when a mosfet is turned on, its associated resistor is connected to seti. as resistors are added in parallel, the total resistance from seti to ground decreases, which causes i fc to increase. in the particular example of a usb input, the circuit of figure 2 could be leveraged as follows: when a vbus connect event is detected, the fp can immediately initi- ate the usb 100ma current mode by setting gpio[6:4] = 0b000. after the usb transceiver has enumerated with 500ma permission, the fp can initiate the usb 500ma current mode by setting gpio[6:4] = 0b010. if the usb transceiver detects that a usb suspend is needed, then the fp can reduce the input current to 40 fa by set - ting gpio[6:4] = 0b001. alternatively, it is possible that after the vbus connect event that the usb transceiver determines that there is a dedicated usb wall charger (d+ and d- shorted together) and then the fp can set the charge current to the full capability of the max8900_ (1.2a) by setting gpio[6:4] = 0b110. no-battery operation no-battery operation may be necessary in the applica - tion and/or end-of-line testing during production. the max8900_ can operate a system without a battery as long as the following conditions are satisfied: u the system must not draw load currents that are greater than i fc . u the system must not draw load currents that are greater than i pq when the battery is less than v pquth . u the thermistor node (thm) must be satisfied. note that if the thermistor is in the battery pack and the pack is removed, the max8900_ thm node voltage goes high and disables the charger. if the max8900_ is expected to deliver charge without a battery then v thm must be forced to avl/2. u the battery node should have enough capacitance to hold the battery voltage to some minimum accept- able system value (v sysrst ) during the done-to-fast- charge state transition time of 100 fs (t done2fc ). done2fc bat load batreg sysrst t ci v -v ? for example, if the maximum system load without a battery could be 300ma (i load ) and the minimum acceptable system voltage is 3.4v (v sysrst ), then the battery node should have at least 37.5 ff. bat 100 s c 300ma 35.7 f 4.2v - 3.4v ? = f f charge-source issues a battery chargers input is typically very accessible to the end-user (i.e., available on a connector) and can potentially be exposed to very harsh conditions. the max8900_ provides for high-reliability solution that can survive harsh conditions seen on its input. charge-source impedance charge source impedance can vary due to quality of the charge source and the associated connectors. the max8900_ operates very nicely with input impedance up to 1i. when high input impedances cause the input voltage to drop, the max8900_ simply reduces the charge current to a sustainable level and tries to put as much energy into the battery as possible. if the input voltage falls within the v in2bat threshold of the battery voltage, the max8900_ shuts down to prevent any cur - rent flowing from the battery back to the charger source. the max8900_ does not suffer from the self-oscillation problems that plague other chargers when exposed to high-impedance sources. inductive kick often the input source has long leads connecting to the max8900_, which, during connection and disconnect, can cause voltage spikes. the lead inductance and the input capacitor create an lc tank circuit. in the event that the lc tank circuit has a high q (i.e., low series maxim integrated
31 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c impedance), the voltage spike could be twice that of the nominal source voltage. in other words, a 6v source with a high-q lc tank circuit in the cabling can result in a voltage spike as high as 12v. the max8900_s high input absolute maximum voltage rating of +22v to -22v eliminates any concerns about the voltage spikes due to inductive kicking for many applications. in the event that an application may see a high-q lc tank circuit in the cabling for a supply that is > +11v, a resistor (r in ) must be added in series with c in to reduce the q of the tank circuit. the resistor value can be found experimentally by assuming the parasitic inductance (l par ) of the input cabling is 1 fh/m, then use the follow - ing equation give a good starting value for r in : par in in l r2 c = an alternative method for estimating l par is to measure the frequency of the input voltage spike ringing and then calculate l par from the following equation. ( ) par r in 1 l 2 fc = overvoltage and reverse input voltage protection the max8900_ provides for a +22v absolute maximum positive input voltage and a -22v absolute maximum negative input voltage. excursions to the absolute maxi - mum voltage levels should be on a transient basis only, but can be withstood by the max8900_ indefinitely. situations that typically require extended input voltage ratings include but are not limited to the following: u inductive kick u charge source failure u power surge u improperly wired wall adapter u improperly set universal wall adapter u wall adapter with the correct plug, but wrong voltage u home-built computer with usb wiring harness con - nected backwards (negative voltage) u usb connector failure u excessive ripple voltage on a switch-mode wall charger u usb powered hub that is powered by a wall charger (typically through a barrel connector) that has any of the aforementioned issues u unregulated charger (passively regulated by the turns ratio of the magnetics turns ratio) u automotive environment (9v, 12v, any of the afore - mentioned in reverse). pcb layout the max8900_ wlp package and bump configuration allows for a small-size low-cost pcb design. figures 3 and 14 show that the max8900_ packages 30 bumps are combined into 18 functional nodes. the bump configura - tion places all like nodes adjacent to each other to mini - mize the area required for routing. the bump configuration also allows for a layout that does not use any vias within the wlp bump matrix (i.e., no micro vias). to utilize this no via layout, cen is left unconnected and the stat3 pin is not used (2-pin status version). figure 15 shows the recommended land pattern for the max8900_. figure 16 shows the cross section of the max8900_s bump with detail of the under-bump metal (ubm). the diameter of each pad in the land pattern is close to the diameter of the ubm. this land pattern to ubm relationship is important to get the proper reflow of each solder bump. underfill is not necessary for the max8900_s package to pass the jesd22-b111 board level drop test method for handheld electronic products. jesd22-b111 covers end applications such as cell phones, pdas, cameras, and other products that are more prone to being dropped dur - ing their lifetime due to their size and weight. please con - sider using underfill for applications that require higher reli - ability than what is covered in the jesd22-b111 standard. careful printed circuit layout is important for minimizing ground bounce and noise. figure 14 is an example layout of the critical power components for the max8900_. the arrangement of the components that are not shown in figure 14 is less critical. refer to the max8900 evaluation kit for a complete pcb layout example. use the following list of guidelines in addition to application note 1891: wafer-level packaging (wlp) and its applications ( www. maximintegrated.com/ucsp ) to layout the max8900_ pcb. maxim integrated
32 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c the guidelines at the top are the most critical: 1) when the step-down converters high-side mosfet turns on, c inbp delivers a high di/dt current pulse to inbp. because of this high di/dt current pulse, place c inbp close to inbp to minimize the parasitic imped - ance in the pcb trace. 2) when the step-down converter is increasing the cur - rent in the inductor, the high-side mosfet is on and current flows in the following path: from c inbp into inbp >> out of lx >> through the inductor >> into cs >> out of bat >> through c bat and back to c inbp through the ground plane. this current loop should be kept small and the electrical length from the posi - tive terminal of c inbp to inbp should be kept short to minimize parasitic impedance. the electrical length from the negative terminal of c bat to the negative terminal of c inbp should be short to minimize para- sitic impedance. keep all sensitive signals such as feedback nodes or audio lines outside of this current loop with as much isolation as your design allows. 3) when the step-down converter is decreasing the inductor current, the low-side mosfet is on and the current flows in the following path: out of lx >> through the inductor >> into cs >> out of bat >> through c bat >> into pgnd >> out of lx again. this current loop should be kept small and the electrical length from the negative terminal of c bat to pgnd should be short to minimize parasitic impedance. keep all sensitive signals such as feedback nodes or audio lines outside of this current loop with as much isolation as your design allows. 4) the lx node voltage switches between inbp and pgnd during the operation of the step-down con - verter. minimize the stray capacitance on the lx node to maintain good efficiency. also, keep all sensitive signals such as feedback nodes or audio lines away from lx with as much isolation as your design allows. 5) in figure 14, the cs node is connected to the second layer of metal with vias. use low-impedance vias that are capable of handling 1.5a of current. also, keep the routing inductor current path on layer 2 just under - neath the inductor current path on layer 1 to minimize impedance. 6) both c bst and c pvl deliver current pulses for the max8900_s mosfet drivers. these components should be placed as shown in figure 14 to minimize parasitic impedance. 7) each of the max8900_ bumps has approximately the same ability to remove heat from the die. connect as much metal as possible to each bump to minimize the b ja associated with the max8900_. see the thermal management section for more information on b ja . in figure 14, many of the top layer bump pads are con- nected together in top metal. when connecting bumps together with top layer metal, the solder mask must define the pads from 180 fm to 210fm as shown in figure 15. when using solder mask defined pads, please double check the solder mask openings on the pcb gerber files before ordering boards as some pcb lay - out tools have configuration settings that automatically oversize solder mask openings. also, explain in the pcb fabrication notes that the solder mask is not to be modi - fied. occasionally, optimization tools are used at the pcb fabrication house that modify solder masks. layouts that do not use solder mask defined pads are possible. when using these layouts, adhere to the recommenda - tions a through g above. figure 14. power pcb layout example maxim integrated
33 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c figure 15. recommended land pattern figure 16. bump cross section and copper pillar detail chip information process: bicmos ordering information (continued) + denotes a lead(pb)-free/rohs-compliant package. t = tape and reel. top view scale drawin g 5x6 bump array (30 bumps) 654321 a b c d e 180m (min) 210m (max ) b: pad pitch: 400 m c: height: 1.6m m d: width: 2.0mm a d a b b c a: finished pad diameter : e: bump diameter: 260 m f: copper pillar (ubm) width: 210m g: copper pillar pitch: 400m copper pillar (ubm) wafe r epox y epoxy epox y epox y e f g pc b copper pillar (ubm) 1oz coppper pad 1oz coppper pa d part temp range pin- package options max8900cewv+t -40nc to +85nc 30 wlp v ovlo = 6.5v t1 = 0nc 3-pin status indicators v pquth = 3.0v maxim integrated
34 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c package type package code outline no. land pattern no. 30 wlp w302a2+1 21-0211 refer to application note 1891 package information for the latest package outline information and land patterns, go to www.maximintegrated.com/packages. note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. e d aaaa pin 1 indicator marking a3 a2 a1 a see note 7 0.05 s s e e1 se d1 b sd a e c d b 1 64 53 2 b a side view -drawing not to scale- top view bottom view a 1 1.60 2.00 0.40 w302a2+3 2.57 w302a2+2 w302a2+1 2.77 2.16 2.36 2.36 2.57 1.96 2.73 2.16 2.31 2.44 2.61 0.64 0.21 0.43 0.025 0.26 1.6 2 21-0211 e title document control no. rev. 1 1 approval package outline 30 bumps, wlp pkg. 0.4mm pitch common dimensions a a2 a1 a3 b e1 d1 e sd se 0.05 0.03 0.03 basic basic 0.00 basic 0.20 basic basic ref basic min max max min e d pkg. code depopulated bumps none notes: 1. terminal pitch is defined by terminal center to center value. 2. outer dimension is defined by center lines between scribe lines. 3. all dimensions in millimeter. 4. marking shown is for package orientation reference only. 5. tolerance is 0.02 unless specified otherwise. 6. all dimensions apply to pbfree (+) package codes only. 7. front - side finish can be either black or clear. none none maxim integrated
maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 35 ? 2011 maxim integrated maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. revision history revision number revision date description pages changed 0 1/10 initial release 1 3/10 corrected various items 1, 4, 5, 15, 30 2 8/10 updated figures 2, 3, 7, and 8 and related text to indicate the charge timer applies to the dead-battery state and corrected other various errors 6,14, 15, 16, 20C22, 27, 31 3 1/11 added max8900c to data sheet 1C35 1.2a switch-mode li+ chargers with 22v input rating and jeita battery temperature monitoring max8900a/max8900b/max8900c

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